LPC2366FBD100

Product Summary

The LPC2366FBD100 is a Single-chip 32-bit microcontroller. It is based on a 32-bit ARM7TDMI-S CPU with real-time emulation that combines the microcontroller with 512 kB of embedded high-speed flash memory. The LPC2366FBD100 is ideal for multi-purpose serial communication applications. It incorporates a 10/100 Ethernet Media Access Controller (MAC), USB full speed device with 4 kB of endpoint RAM, four UARTs, two CAN channels, an SPI interface, two Synchronous Serial Ports (SSP), three I2C-bus interfaces, an I2S-bus interface, and an External Memory Controller (EMC). This blend of serial communications interfaces combined with an on-chip 4 MHz internal oscillator, SRAM of 32 kB, 16 kB SRAM for Ethernet, 8 kB SRAM for USB and general purpose use, together with 2 kB battery powered SRAM make the LPC2366FBD100 very well suited for communication gateways and protocol converters.

Parametrics

LPC2366FBD100 absolute maximum ratings: (1)supply voltage (3.3 V):3.0V to 3.6V; (2)DC-to-DC converter supply voltage(3.3 V):3.0V to 3.6V; (3)analog 3.3 V pad supply voltage:-0.5V to +4.6V; (4)input voltage on pin VBAT for the RTC:-0.5V to +4.6V; (5)input voltage on pin VREF:-0.5V to +4.6V; (6)analog input voltage on ADC related pins:-0.5V to +5.1V; (7)input voltage:5 V tolerant I/O pins; only valid when the VDD(3V3) supply voltage is present:-0.5V to +6.0V, other I/O pins:-0.5V to VDD(3V3) +0.5V; (8)supply current per supply pin:100mA; (9)ground current per ground pin:100mA; (10)storage temperature:-65℃ to +150℃; (11)total power dissipation (per package) based on package:1.5W; (12)electrostatic discharge voltage human body:-2000V to +2000V.

Features

LPC2366FBD100 features: (1)ARM7TDMI-S processor, running at up to 72 MHz; (2)Up to 512 kB on-chip flash program memory with In-System Programming (ISP) and In-Application Programming (IAP) capabilities. Flash program memory is on the ARM local bus for high performance CPU access; (3)32 kB of SRAM on the ARM local bus for high performance CPU access; (4)16 kB SRAM for Ethernet interface. Can also be used as general purpose SRAM; (5)8 kB SRAM for general purpose DMA use also accessible by the USB; (6)Dual Advanced High-performance Bus (AHB) system that provides for simultaneous Ethernet DMA, USB DMA, and program execution from on-chip flash with no contention between those functions. A bus bridge allows the Ethernet DMA to access the other AHB subsystem; (7)EMC provides support for static devices such as flash and SRAM as well as off-chip memory mapped peripherals; (8)Advanced Vectored Interrupt Controller (VIC), supporting up to 32 vectored interrupts; (9)Standard ARM test/debug interface for compatibility with existing tools; (10)Emulation trace module supports real-time trace; (11)Single 3.3 V power supply (3.0 V to 3.6 V); (12)Three reduced power modes: idle, sleep, and power-down; (13)Four external interrupt inputs configurable as edge/level sensitive. All pins on PORT0 and PORT2 can be used as edge sensitive interrupt sources.

Diagrams